Senior VLSI Designer

Kfar Netter

About The Position

Autotalks is looking for a gifted Senior VLSI Engineer to be part of the design team of Autotalks next SoC. This individual will be in charge of SoC top level and subsystems integration. Define and manage the integration process, define release methodologies, integrate top level integration tool into the design process.

Some of the main responsibilities in this position include:

  • Define the integration methodology of the team.
  • Manage SOC level and subsystems integration.
  • Derive micro-architecture documents from spec/architecture
  • Lead an activity of IP design (Hands-on).
  • Integration of units and IPs
  • Run and debug front end tools (LINT,CDC)
  • Assist lab engineers with failure

Requirements

Required qualifications and experience:

  • B.Sc. in Electrical Engineering or equivalent
  • At least 7 years of VLSI front end design experience
  • Ability to define subsystems micro-architecture under system-level requirements
  • Strong background in ARM and NOC architecture 
  • Verilog as mother tongue
  • Proven experience in designing big clusters (>5MG)
  • Full understanding of AMBA protocols
  • Experience with CPU subsystems
  • Experience with front-end tools – Lint,CDC
  • Full understanding of the verification flow
  • Experience with synthesis tools is an advantage


Personal characteristics:

  • Team player
  • Excellent interpersonal skills
  • “Can-Do” attitude
  • Fast learner, self-motivated
  • Strong technical skills, open mind and ability to work in “multi-tasks” mode
  • Ability to work in a dynamic environment
  • Problem solving attitude

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